1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to data processing systems capable of executing instructions from more than one instruction set.
2. Description of the Prior Art
It is known to provide data processing systems that are capable of executing instructions from more than one instruction set. An example of such systems are the processors produced by ARM Limited of Cambridge, England that are able to execute both the 32-bit ARM instruction set and the 16-bit Thumb instruction set.
A more recently developed type of data processing system executing more than one instruction set is that which seeks to execute both its own native instruction set and Java bytecode instructions. More particularly, there have been proposed and developed Java acceleration techniques that provide special purpose hardware for executing Java bytecodes. An example of such an approach is the Jazelle architectural enhancement designed by ARM Limited of Cambridge, England that serves to execute Java bytecodes using a processor core that also executes native ARM instructions.
A problem with the above technique is that some Java bytecodes are not well suited to being executed by the relatively simple architectural hardware enhancement provided by Jazelle. The more complex Java bytecodes are accordingly passed to supporting software for execution. Such an approach is able to keep down the complexity of the hardware Java acceleration system whilst providing full coverage of all the Java bytecodes that may be encountered and required for execution. However, different implementations of the Java acceleration hardware that are developed to suit particular circumstances and evolve with time may require different Java bytecodes to be supported by software execution rather than executed by the hardware mechanisms provided. This disadvantageously requires a different set of supporting software to be developed and tested for each version of the Java acceleration hardware. This is expensive and time consuming.
A further problem that can arise with the known Java acceleration technique is that it is relatively difficult to debug and trace the operation of the system when it is executing Java bytecodes. In particular, a single Java bytecode that is executed by the hardware may in practice represent a large number of discreet processing operations to be performed by the processor core and yet the way that Java bytecodes are treated atomically by the acceleration hardware does not allow the ready insertion of breakpoints, step-by-step processing or other useful diagnostic techniques.